Hardware Architecture Interface

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ZEP-SRS-19-

Type	Level	UID	STATUS	TYPE	COMPONENT	REFS	Title	Statement	USER_STORY
TEXT								SPDX-License-Identifier: Apache-2.0
REQUIREMENT	1	ZEP-SRS-19-1	Draft	Functional	Hardware Architecture Interface	Parents: ZEP-SYRS-1 Architecture Layer Interface	ZEP-SRS-19-1 Atomic Operations	The Zephyr RTOS shall provide an interface to access memory while ensuring mutual exclusion.	As a Zephyr RTOS user I want to read from or write into a memory areas without being disturbed by other threads or ISRs.
REQUIREMENT	2	ZEP-SRS-19-2	Draft	Functional	Hardware Architecture Interface	Parents: ZEP-SYRS-1 Architecture Layer Interface	ZEP-SRS-19-2 Thread Context Switching	The Zephyr RTOS shall provide a mechanism for context switching between threads.	As a Zephyr RTOS user I want to execute code concurrently in one or more threads and when interrupted at a code location in a thread, to continue at the very same location.
REQUIREMENT	3	ZEP-SRS-19-3	Draft	Functional	Hardware Architecture Interface	Parents: ZEP-SYRS-1 Architecture Layer Interface	ZEP-SRS-19-3 Software Exceptions	The Zephyr RTOS shall provide an interface to implement software exceptions.	As a Zephyr RTOS user I want to catch any software exception and handle it according to my application needs.
REQUIREMENT	4	ZEP-SRS-19-4	Draft	Functional	Hardware Architecture Interface	Parents: ZEP-SYRS-1 Architecture Layer Interface	ZEP-SRS-19-4 Processor Mode Support	The Zephyr RTOS shall provide an interface for managing processor modes.	If MCU power state was meant here: As a Zephyr RTOS user I want to control the MCU's power saving mode such e.g. operation, sleep, deep sleep or similar as supported by the selected MCU.