zephyr::device::gpio

Struct GpioPin

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pub struct GpioPin { /* private fields */ }
Expand description

A GpioPin represents a single pin on a gpio device.

This is a lightweight wrapper around the Zephyr gpio_dt_spec structure. Note that multiple pins may share a gpio controller, and as such, all methods on this are both unsafe, and require a mutable reference to the GpioToken.

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impl GpioPin

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pub unsafe fn wait_for_high( &mut self, _token: &mut GpioToken, ) -> impl Future<Output = ()> + use<'_>

Asynchronously wait for a gpio pin to become high.

§Safety

The _token enforces single use of gpios. Note that this makes it impossible to wait for more than one GPIO.

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pub unsafe fn wait_for_low( &mut self, _token: &mut GpioToken, ) -> impl Future<Output = ()> + use<'_>

Asynchronously wait for a gpio pin to become low.

§Safety

The _token enforces single use of gpios. Note that this makes it impossible to wait for more than one GPIO.

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impl GpioPin

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pub fn is_ready(&self) -> bool

Verify that the device is ready for use. At a minimum, this means the device has been successfully initialized.

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pub fn get_gpio(&self) -> Gpio

Get the underlying Gpio device.

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pub unsafe fn configure( &mut self, _token: &mut GpioToken, extra_flags: gpio_flags_t, )

Configure a single pin.

§Safety

The _token enforces single threaded use of gpios from Rust code. However, many drivers within Zephyr use GPIOs, and to use gpios safely, the caller must ensure that there is either not simultaneous use, or the gpio driver in question is thread safe.

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pub unsafe fn toggle_pin(&mut self, _token: &mut GpioToken)

Toggle pin level.

§Safety

The _token enforces single threaded use of gpios from Rust code. However, many drivers within Zephyr use GPIOs, and to use gpios safely, the caller must ensure that there is either not simultaneous use, or the gpio driver in question is thread safe.

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pub unsafe fn set(&mut self, _token: &mut GpioToken, value: bool)

Set the logical level of the pin.

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pub unsafe fn get(&mut self, _token: &mut GpioToken) -> bool

Read the logical level of the pin.

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